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Sustainable Wireless Network-on-Chip Architectures

Authors: Jacob Murray, Paul Wettin, Partha Pratim Pande, Behrooz Shirazi Publisher: Elsevier Science Publication date: 2016 Publication language: Angielski Number of pages: 163 Publication formats: EAN: 9780128036518 ISBN: 9780128036518 Category: Computing & information technology Publisher's index: 9780128036259 Bibliographic note: Behrooz A. Shirazi is the Huie-Rogers Chair Professor and the Director of the School of Electrical Engineering and Computer Science at Washington State University. Dr. Shirazi has conducted research in the areas of sustainable computing, pervasive computing, software tools, distributed real-time systems, and parallel and distributed systems over the past eighteen years. He is currently serving as the Editor-in-Chief for Special Issues for the Pervasive and Mobile Computing (PMC) Journal and the Sustainable Computing (SUSCOM) Journal. He has served on the editorial boards of the IEEE Transactions on Computers and Journal of Parallel and Distributed Computing in the past. He is a co-founder of the International Green Computing Conference.


Sustainable Wireless Network-on-Chip Architectures focuses on developing novel Dynamic Thermal Management (DTM) and Dynamic Voltage and Frequency Scaling (DVFS) algorithms that exploit the advantages inherent in WiNoC architectures. The methodologies proposed—combined with extensive experimental validation—collectively represent efforts to create a sustainable NoC architecture for future many-core chips. Current research trends show a necessary paradigm shift towards green and sustainable computing. As implementing massively parallel energy-efficient CPUs and reducing resource consumption become standard, and their speed and power continuously increase, energy issues become a significant concern.

The need for promoting research in sustainable computing is imperative. As hundreds of cores are integrated in a single chip, designing effective packages for dissipating maximum heat is infeasible. Moreover, technology scaling is pushing the limits of affordable cooling, thereby requiring suitable design techniques to reduce peak temperatures. Addressing thermal concerns at different design stages is critical to the success of future generation systems. DTM and DVFS appear as solutions to avoid high spatial and temporal temperature variations among NoC components, and thereby mitigate local network hotspots.

  • Defines new complex, sustainable network-on-chip architectures to reduce network latency and energy
  • Develops topology-agnostic dynamic thermal management and dynamic voltage and frequency scaling techniques
  • Describes joint strategies for network- and core-level sustainability
  • Discusses novel algorithms that exploit the advantages inherent in Wireless Network-on-Chip architectures


  • Front Cover 2
  • Sustainable Wireless Network-on-Chip Architectures 5
  • Copyright Page 6
  • Contents 7
  • 1 Introduction 9
    • Traditional NoC Interconnect Topologies 9
    • The Network-on-Chip Paradigm 9
    • Traditional NoC Routing 13
    • Traditional NoC Backbone 16
    • References 17
  • 2 Current Research Trends and State-of-the-Art NoC Designs 19
    • The Small-World Topology (and Other Irregular Topologies) 19
    • Design for Topology-Agnostic Routing for Irregular Networks 22
    • 3D, Optical, and Wireless Integration for NoC 23
    • Power- and Temperature-Aware Design Considerations 27
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Author's affiliation

Jacob Murray: School of Electrical Engineering and Computer
Paul Wettin: Marvell Semiconductor Inc., Boise, ID, USA
Partha Pratim Pande: School of Electrical Engineering, Washington
Behrooz Shirazi: School of Electrical Engineering, Washington